Mentor Graphics QuestaSim 10.6c
Mentor Graphics QuestaSim 10.6c
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Mentor Graphics QuestaSim 10.6c | File size: 1.7 GB (Total)
Mentor, a Siemens business, has unveiled QuestaSim 10.6c, is part of the Questa Advanced Functional Verification Platform and is the latest tool in Mentor Graphics tool suite for Functional Verification.
New Features Contained in this Release:
- Improved SystemVerilog/Verilog/VHDL performance and optimizations
- Improved profiling and capacity reporting, capstats tools
- Improved Gate Level performance and delay model support
- Gate Level new find loop feature
- Questa Fast Dumping (QFD) support for SAIF, TCL, UVM backdoor
- Code Coverage Adaptive Exclusions Support
About QuestaSim. QuestaSim is part of the Questa Advanced Functional Verification Platform and is the latest tool in Mentor Graphics tool suite for Functional Verification. The tool provides simulation support for latest standards of SystemC, SystemVerilog, Verilog 2001 standard and VHDL. This tool is an advancement over Modelsim in its support for advanced Verification features like coverage databases, coverage driven verification, working with assertions, SystemVerilog constrained-random functionality.
About Mentor Graphics. Mentor Graphics Corporation is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the worlds most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues in the last fiscal year in excess of $1.15 billion. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777.
Supported Architectures: 32bit / 64bit
Language: english
System Requirements: PC
Supported Operating Systems: Windows 7even or newer
HOMEPAGE
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DOWNLOAD LINKS :
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